Feature
　　Clock
　　Optional main clock resource(external OSC ,external CLK or CR)
　　Optional sub clock resource
　　External Interrupt 8 channel
　　Edge Detector Interrupt (optional rising edge, falling edge, and double edges)
　　I/O Port:28/29
　　Timer:
　　8/16-bit composite timer × 1 channel
　　16-bit PPG × 1 channel
　　16-bit free-running timer × 1 channel
　　16-bit output compare × 2 channels
　　Time-base timer × 1 channel
　　Hardware/software watchdog
　　Reset circuit for low-voltage detector
　　UART/SIO 1channel
　　I2C 1 channel
　　Flash storage safety function / Flash dual bank operation
　　On-chip-debug function
　　SDIP32, LQFP32 Package